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020 a| 9781118861882 (pdf);

020 a| 9781118861844 (epub);

020 z| 9781118861905 (hardback);

035 a| (WaSeSS)ssj0001569558;

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082 00 a| 537/.22| 23;

084 a| TEC0310002| bisacsh;

100 1 a| Duvvury, Charvaka,d| 1944-?| UNAUTHORIZED;

245 10 a| System level ESD co-designh| [electronic resource] /c| Charvaka Duvvury, Independent ESD Industry Consultant, Texas, USA, Harald Gossner, Intel, Germany.;

260 a| Hoboken :b| John Wiley and Sons, Inc.,c| 2015.;

300 a| 1 online resource.;

504 a| Includes bibliographical references and index.;

505 8 a| Machine generated contents note: Chapter 1 Introduction Charvaka Duvvury Chapter 2 Component Versus System Level ESD Charvaka Duvvury and Harald Gossner Chapter 3 System Level Testing for ESD Susceptibility Michael Hopkins Chapter 4 PCB/IC Co-Design Concepts for SEED Harald Gossner and Charvaka Duvvury Chapter 5 Hard Fails & PCB Protection Devices Robert Ashton Chapter 6 Soft Fail and PCB design measures David Pommerenke and Pratik Maheshwari Chapter 7 ESD in Mobile Devices Matti Uusimaki Chapter 8 ESD for Automotive Applications Wolfgang Reinprecht Chapter 9 Futire Applications of SEED Methodology Harald Gossner and Charvaka Duvvury Chapter 10 Co-Design Tradeoffs: Balancing Robustness, Performance and Cost Jeffery C. Dunnihoo Index .;

506 a| Available only to authorized users.;

520 a| "Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the "co-design", an optimization methodology to address both issues in the same design space"--c| Provided by publisher.;

538 a| Mode of access: World Wide Web;

588 a| Description based on print version record and CIP data provided by publisher.;

650 0 a| Shielding (Electricity)=| ^A28950;

650 0 a| Electronic apparatus and appliancesx| Design and construction.=| ^A34354;

650 0 a| Integrated circuitsx| Design and construction.=| ^A164350;

650 0 a| Integrated circuitsx| Protection.=| ^A42814;

650 0 a| Electrostatics.=| ^A7571;

650 0 a| Static eliminators.=| ^A139041;

650 7 a| TECHNOLOGY & ENGINEERING / Power Resources / General.2| bisacsh;

655 0 a| Electronic books.=| ^A491897;

700 1 a| Gossner, Harald.=| ^A1276744;

776 08 i| Print version:a| Duvvury, Charvaka, 1944-t| System level ESD co-designd| Hoboken : John Wiley and Sons, Inc., 2015z| 9781118861905w| (DLC) 2015008307;

856 40 z| Full text available from Ebook Central - Academic Completeu| https://ebookcentral.proquest.com/lib/eastcarolina/detail.action?docID=4039349;

949 a| CLICK ON WEB ADDRESSw| ASISh| JOYNER188;

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999 a| CLICK ON WEB ADDRESSw| ASISc| 1i| 4995855-2001l| HSLELECm| HSLr| Ys| Yt| HEBKu| 12/11/2018x| EBOOKz| HERESOURCE;

999 a| CLICK ON WEB ADDRESSw| ASISc| 1i| 4995855-3001l| MNETm| JMUSICr| Ys| Yt| MNESSBKu| 12/11/2018x| EBOOKz| JERESOURCE;

System level ESD co-design / Charvaka Duvvury, Independent ESD Industry Consultant, Texas, USA, Harald Gossner, Intel, Germany.

Author/creator	Duvvury, Charvaka, 1944-
Other author	Gossner, Harald.
Format	Electronic
Publication Info	Hoboken : John Wiley and Sons, Inc., 2015.
Description	1 online resource.
Supplemental Content	Full text available from Ebook Central - Academic Complete
Subjects	Shielding (Electricity) Electronic apparatus and appliances--Design and construction. Integrated circuits--Design and construction. Integrated circuits--Protection. Electrostatics. Static eliminators.

Contents	Machine generated contents note: Chapter 1 Introduction Charvaka Duvvury Chapter 2 Component Versus System Level ESD Charvaka Duvvury and Harald Gossner Chapter 3 System Level Testing for ESD Susceptibility Michael Hopkins Chapter 4 PCB/IC Co-Design Concepts for SEED Harald Gossner and Charvaka Duvvury Chapter 5 Hard Fails & PCB Protection Devices Robert Ashton Chapter 6 Soft Fail and PCB design measures David Pommerenke and Pratik Maheshwari Chapter 7 ESD in Mobile Devices Matti Uusimaki Chapter 8 ESD for Automotive Applications Wolfgang Reinprecht Chapter 9 Futire Applications of SEED Methodology Harald Gossner and Charvaka Duvvury Chapter 10 Co-Design Tradeoffs: Balancing Robustness, Performance and Cost Jeffery C. Dunnihoo Index .
Abstract	"Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the "co-design", an optimization methodology to address both issues in the same design space"-- Provided by publisher.
Bibliography note	Includes bibliographical references and index.
Access restriction	Available only to authorized users.
Technical details	Mode of access: World Wide Web
Source of description	Description based on print version record and CIP data provided by publisher.
Issued in other form	Print version: Duvvury, Charvaka, 1944- System level ESD co-design Hoboken : John Wiley and Sons, Inc., 2015 9781118861905
Genre/form	Electronic books.
LCCN	2015012035
ISBN	9781118861882 (pdf)
ISBN	9781118861844 (epub)

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System level ESD co-design / Charvaka Duvvury, Independent ESD Industry Consultant, Texas, USA, Harald Gossner, Intel, Germany.

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