European Test Workshop 1999 Proceedings, May 25-28, 1999, Constance, Germany

Author/creator Wunderlich, Hans-Joachim Author
Other author IEEE Xplore (Online service)
Format Electronic
Publication InfoLos Alamitos : IEEE Computer Society Press
Descriptionxv, 171 p. ill
Supplemental ContentFull text available from IEEE Electronic Library (IEL)
Supplemental ContentFull text available from IEEE Conference Proceedings Archive
Supplemental ContentFull text available from IEEE Electronic Library (IEL) Conference Proceedings
Subjects

Summary Annotation This proceedings contains extended version of a selected subset of the contributions presented at the May 1999 IEEE workshop. The 27 papers share research and development (RandD) results in electronic testing. Topics include calculating efficient LFSR seeds for built-in self test, functional and structural testing of switched-current circuits, compaction of IDDQ test sequence using reassignment method, debug facilities in the TriMedia CPU64 architecture, deterministic BIST with partial scan, and using the BS register for capturing and storing n-bit sequences in real-time. Other papers address MEMs, switched capacitors, ATPG and fault modeling, fault simulation and fault coverage of analog circuits, FPGAs and regular arrays, and low power BIST. No subject index. Annotation copyrighted by Book News, Inc., Portland, OR
Access restrictionAvailable only to authorized users.
Technical detailsMode of access: World Wide Web
Genre/formElectronic books.
LCCN 99065878
ISBN9780769503905
ISBN076950390X (Trade Cloth) Active Record
Standard identifier# 9780769503905
Stock number00029433

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