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008 111125s2012 njua sb 001 0 eng d;

010 a| 2011048946;

020 a| 9781118011034 (hardback);

035 a| (WaSeSS)ssj0000634610;

040 a| DLCc| DLCd| DLCd| WaSeSS;

042 a| pcc;

049 a| EREEa| NEHH;

050 00 a| TK7895.E42b| C48 2012;

082 00 a| 006.2/22| 23;

084 a| TEC0080102| bisacsh;

100 1 a| Chu, Pong P.,d| 1959-=| ^A1103287;

245 10 a| Embedded SoPC design with NIOS II processor and Verilog examplesh| [electronic resource] /c| Pong P. Chu.;

260 a| Hoboken, N.J. :b| Wiley,;

300 a| xxxiii, 747 p. :b| ill. ;c| 26 cm.;

504 a| Includes bibliographical references (P. 741-743) and index.;

506 a| Available only to authorized users.;

520 a| "This book explores the unique hardware programmability of FPGA (field-programmable gate array)-based embedded systems, using a learning-by-doing approach to introduce the concepts and techniques for embedded SoPC (system on a programmable chip) systems with Verilog. The book contains a large number of practical examples to illustrate and reinforce the hardware and software design concepts and techniques, as well as a complete code listing and experiment problems. The book is designed for upper-level undergraduate and entry-level graduate students in computer engineering, as well as practicing engineers"--c| Provided by publisher.;

520 a| "The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures"--c| Provided by publisher.;

538 a| Mode of access: World Wide Web;

650 0 a| Embedded computer systems.=| ^A422987;

650 0 a| Field programmable gate arrays.=| ^A685172;

650 0 a| Verilog (Computer hardware description language)=| ^A316270;

650 7 a| TECHNOLOGY & ENGINEERING / Electronics / Circuits / General.2| bisacsh;

655 0 a| Electronic books.=| ^A491897;

856 40 z| Full text available from Ebook Central - Academic Completeu| https://ebookcentral.proquest.com/lib/eastcarolina/detail.action?docID=822053;

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999 a| CLICK ON WEB ADDRESSw| ASISc| 1i| 4060897-2001l| HSLELECm| HSLr| Ys| Yt| HEBKu| 1/1/2016x| EBOOKz| HERESOURCE;

999 a| CLICK ON WEB ADDRESSw| ASISc| 1i| 4060897-3001l| MNETm| JMUSICr| Ys| Yt| MNESSBKu| 1/1/2016x| EBOOKz| JERESOURCE;

Embedded SoPC design with NIOS II processor and Verilog examples / Pong P. Chu.

Author/creator	Chu, Pong P., 1959-
Format	Electronic
Publication Info	Hoboken, N.J. : Wiley,
Description	xxxiii, 747 p. : ill. ; 26 cm.
Supplemental Content	Full text available from Ebook Central - Academic Complete
Subjects	Embedded computer systems. Field programmable gate arrays. Verilog (Computer hardware description language)

Abstract	"This book explores the unique hardware programmability of FPGA (field-programmable gate array)-based embedded systems, using a learning-by-doing approach to introduce the concepts and techniques for embedded SoPC (system on a programmable chip) systems with Verilog. The book contains a large number of practical examples to illustrate and reinforce the hardware and software design concepts and techniques, as well as a complete code listing and experiment problems. The book is designed for upper-level undergraduate and entry-level graduate students in computer engineering, as well as practicing engineers"-- Provided by publisher.
Abstract	"The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures"-- Provided by publisher.
Bibliography note	Includes bibliographical references (P. 741-743) and index.
Access restriction	Available only to authorized users.
Technical details	Mode of access: World Wide Web
Genre/form	Electronic books.
LCCN	2011048946
ISBN	9781118011034 (hardback)

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Embedded SoPC design with NIOS II processor and Verilog examples / Pong P. Chu.

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