Computer Architecture (ISCA 2002) 29th Annual International Symposium
| Author/creator | IEEE Computer Society Staff |
| Other author | ACM Digital Library. |
| Other author | IEEE Xplore (Online service) |
| Format | Electronic |
| Publication Info | I E E E [Imprint] Los Alamitos : IEEE Computer Society Press |
| Description | 320 p. 28.000 x 022.000 cm. |
| Supplemental Content | Full text available from ACM Digital Library |
| Supplemental Content | Full text available from IEEE Electronic Library (IEL) Conference Proceedings |
| Supplemental Content | Full text available from IEEE Electronic Library (IEL) |
| Subjects |
| Summary | Annotation Material from a May 2002 symposium describe recent work in processor pipelines, processor scheduling, safety and reliability, power aware architecture, memory systems, dynamic optimization, vector architectures, and supporting deep speculation. Some subjects include transient-fault recovery using simultaneous multithreading, power and performance evaluation of globally asynchronous locally synchronous processors, implementing optimizations at decode time, and managing multiconfiguration hardware via dynamic working set analysis. Other areas explored are speculative dynamic vectorization, design tradeoffs for the Alpha EV8 conditional branch predictor, difficult-path branch prediction using subordinate microthreads, and efficient dynamic scheduling through tag elimination. This work lacks a subject index. Annotation copyrighted by Book News, Inc., Portland, OR. |
| Access restriction | Available only to authorized users. |
| Technical details | Mode of access: World Wide Web |
| Genre/form | Electronic books. |
| ISBN | 9780769516059 |
| ISBN | 076951605X (Trade Paper) Active Record |
| Standard identifier# | 9780769516059 |
| Stock number | 00029433 |
Availability
| Library | Location | Call Number | Status | Item Actions |
|---|---|---|---|---|
| Electronic Resources | ✔ Available |