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Cover image for Logic Synthesis for VLSI-Based Combined Finite State Machines Synthesis Targeting ASICs, CPLDs and FPGAs

Logic Synthesis for VLSI-Based Combined Finite State Machines Synthesis Targeting ASICs, CPLDs and FPGAs

by Barkalov, Alexander
2022
1st ed. 2022
Format: Electronic

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Cover image for Logic Synthesis for Finite State Machines Based on Linear Chains of States Foundations, Recent Developments and Challenges

Logic Synthesis for Finite State Machines Based on Linear Chains of States Foundations, Recent Developments and Challenges

by Barkalov, Alexander
2018
Format: Electronic

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Cover image for Logic Synthesis for FPGA-Based Finite State Machines

Logic Synthesis for FPGA-Based Finite State Machines

by Barkalov, Alexander
2016
1st ed. 2016
Format: Electronic

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Cover image for Logic synthesis for compositional microprogram control units

Logic synthesis for compositional microprogram control units

by Barkalov, Alexander
2008
Format: Book

Location	Call #	Status
Joyner - General Stacks	QA76.635 .B37 2008	✔ Available